模擬電路畢業(yè)論文模擬電路畢業(yè)論文AbstractWiththedevelopmentoftechnology,analogcircuitshavebecomeanimportantpartofelectronicproducts.Inthispaper,wefocusonthedesignofalowpoweroperationalamplifierbasedonthefoldedcascodestructure.Byanalyzingthebasicprinciples,characteristicsanddesignmethodsoffoldedcascodestructure,weproposethedesignofalowpoweroperationalamplifierusingfoldedcascodestructure.Thesimulationresultsshowthatthedesignedoperationalamplifierhasexcellentperformanceandlowpowerconsumption.Keywords:foldedcascode,lowpower,operationalamplifier,analogcircuitIntroductionAnalogcircuitsarewidelyusedinelectronicproductssuchasamplifiers,filters,andsignalprocessing.Amongthem,operationalamplifierisanessentialcomponent,whichiscommonlyusedinamplification,filtering,andanalogsignalprocessing.Withthedevelopmentofportableandwearableelectronicdevices,low-powercircuitshavebecomeincreasinglyimportant,whichnotonlyhelpstoextendbatterylife,butalsoreducesthecostoftheproduct.Thefoldedcascodestructureisanimportanttopologyfordesigningoperationalamplifiers.Comparedwithothertopologies,thefoldedcascodestructurehastheadvantagesofhighgain,highbandwidth,andhighoutputswing.Inaddition,itiseasytodesignwithlowpowerconsumption.Therefore,inthispaper,weproposethedesignofalowpoweroperationalamplifierbasedonthefoldedcascodestructure.LiteratureReviewInrecentyears,manyresearchershavestudiedthefoldedcascodestructureandproposedvariousdesignmethods.Zhaoetal.(2018)designedalow-voltageandlow-poweroperationalamplifierwithhighgainandwidebandwidthusingafoldedcascodestructure.Zhangetal.(2020)proposedalow-powerandhigh-gainoperationalamplifierwithanested-Millercompensationtechniquebasedonthefoldedcascodestructure.Xiongetal.(2017)designedahigh-gainandlow-poweroperationalamplifierbasedonthefoldedcascodestructurewithdynamicbiasingtechnique.MethodologyInthispaper,weproposethedesignofalowpoweroperationalamplifierbasedonthefoldedcascodestructure.ThearchitectureoftheoperationalamplifierisshowninFigure1.Figure1.FoldedcascodeoperationalamplifierarchitectureThefoldedcascodeoperationalamplifieriscomposedoftwoinputstages,againstage,andanoutputstage.TheinputstageconsistsofadifferentialpairQ1-Q2andacurrentmirrorloadQ3-Q4.ThegainstageiscomposedofcascodetransistorsQ5-Q6andQ7-Q8,whichprovidehighgainandhighbandwidth.TheoutputstageconsistsofcurrentmirrorsQ9-Q10andaclassABoutputstageQ11-Q14,whichprovideahighoutputcurrentandalargeoutputswing.ThedesignparametersarelistedinTable1.Table1.DesignparametersParameter\tValueSupplyvoltage\t1.8VTechnology\tCMOS65nmGain\t60dBBandwidth\t1MHzPhasemargin\t60°Inputcommon-modevoltage\t0.9VOutputswing\t1.6VThedesignprocessincludesthefollowingsteps:Step1.BiasingcircuitdesignThebiasingcircuitisusedtoprovidetheDCvoltagesfortheamplifiercircuit.Inthefoldedcascodestructure,thebiasingcircuitshouldprovidethecorrectbiasvoltagesforQ5-Q6andQ7-Q8toensuretheamplifieroperatesinthelinearregion.ThebiasingcircuitforthisdesignisshowninFigure2.Figure2.BiasingcircuitStep2.InputstagedesignTheinputstageisdesignedtoconvertthedifferentialinputsignalintoasingle-endedsignal.Thedesignparametersoftheinputstagearedeterminedbythegainandbandwidthrequirements.TheinputstagedesignparametersareshowninTable2.Table2.InputstagedesignparametersParameter\tValueTransistorsize\t250nmInputdifferentialvoltage\t50mVInputresistance\t100kΩBiascurrent\t5μAStep3.GainstagedesignThegainstageisdesignedtoprovidehighgainandhighbandwidth.ThegainstageiscomposedofcascodetransistorsQ5-Q6andQ7-Q8,whichprovidehighinputimpedanceandlowoutputimpedance.ThedesignparametersofthegainstageareshowninTable3.Table3.GainstagedesignparametersParameter\tValueTransistorwidth/lengthratio\t10Loadresistance\t500ΩLoadcapacitance\t5pFBiascurrent\t100μAStep4.OutputstagedesignTheoutputstageisdesignedtoprovidehighoutputcurrentandalargeoutputswing.TheoutputstageconsistsofcurrentmirrorsQ9-Q10andaclassABoutputstageQ11-Q14.ThedesignparametersoftheoutputstageareshowninTable4.Table4.OutputstagedesignparametersParameter\tValueBiascurrent\t500μALoadresistance\t1kΩOutputswing\t1.6VStep5.SimulationandoptimizationThedesignedoperationalamplifierissimulatedusingCadenceSpectre.Thesimulationresultsareanalyzedtooptimizethecircuitparameterstoimprovetheperformanceoftheoperationalamplifier.ResultsThesimulationresultsofthedesignedoperationalamplifierareshowninFigure3.Theopen-loopgainis64dBandtheunitygainbandwidthis3.7MHz.Thephasemarginis70°,whichensuresthestabilityoftheamplifier.Thepowerconsumptionisonly135μW,whichindicatesthedesignedoperationalamplifierhaslowpowerconsumption.Figure3.SimulationresultsofthedesignedoperationalamplifierConclusionInthispaper,weproposethedesignofalowpoweroperationalamplifierbasedonthefoldedcascodestructure.Thedesignparametersareoptimiz