LevelsofHighLevelProgramHighLevelProgram(e.g.,AssemblyAssemblyProgram(e.g.,

Anythingcanbeasanumber,i.e.,dataorMachineMachineLanguageProgram(MIPS)(e.g.,blockLogicCircuit(CircuitSchematic 內(nèi)容主要取材：CS61C的5?機器語寄存判斷航空航天大學計算機內(nèi)容主要取材：CS61C的5?寄存判斷航空航天大學計算機MachineLanguage“Word”acomputerunderstands:Vocabularyofall“words”acomputerunderstands:instructionsetarchitecture(ISA)WhymightyouwantthesameISA?WhymightyouwantdifferentISAs? andiPadusethe andMacbookuse Summer2012--Lecture MachineLanguageSingleLeveragecommoncompilers,operatingsystems,BUTfairlyeasytoretargetthesefordifferentISAs(e.g.Linux,gcc)MultipleSpecializedinstructionsforspecializedDifferenttradeoffsinresourcespowerconsumption,etc.)Competitionandinnovationisgood,especiallyinemergingenvironments(e.g.mobiledevices) Summer2012--Lecture WhyStudyLearntowritemorecompactandefficientCansometimeshandoptimizebetterthanaMoresensibleforminimalistice.g.distributedsensingandEliminatingOS,compilers,etc.reducesizeandpowerconsumptionEmbeddedcomputersoutnumber Summer2012--Lecture ReducedInstructionSetTheearlytrendwastoaddmoreandmoreinstructionstodoelaborateoperations–thisbecameknownasComplexInstructionSetComputing(CISC)OppositephilosophylaterbegantoReducedInstructionSetComputingSimpler(andsmaller)instructionsetmakesiteasiertobuildfasthardwareLetsoftwaredothecomplicatedoperationsbycomposingsimpleronesphilosophy/哲 Summer Lecturephilosophy/哲RISCDesignBasicRISCprinciple:“AsimplerCPU(thehardwarethatmachinelanguage)isafasterCPU”(CPU→FocusoftheRISCdesignisreductionofthenumberandcomplexityofinstructionsintheISAAnumberofthemorecommonstrategiesFixedinstructionlength,generallyasingleSimplifiesprocessoffetchinginstructionsfromSimplifiesprocessoffetchingoperandsfromFewerandsimplerinstructionsintheinstructionOnlyloadandstoreinstructionsaccessLetthecompilerdoit.Useagoodcompilertobreakcomplexhigh-levellanguagestatementsintoanumberofsimpleassemblylanguage Spring2012--Lecture Mainstream UsedinMacbooksandFoundinCorei3,Corei5,Corei7,AdvancedRISCMachine ,iPad,iPod,ThemostpopularRISC(20xmorecommonthanAirborneequipment:FlightControl,Radar,EngineEmbeddeddevcies:Networkswitch/router,airborne/航 Summer Lectureairborne/航

InstructionSetinCSInventedbyJohnHennessy@(WhynotBerkeley/SunRISCinventedbyDavePatterson?Askhim!)MIPSisarealworldStandardinstructionsetfornetworkingElegantexampleofReducedInstructionSetComputer(RISC)instructionset Spring2012--Lecture 內(nèi)容主要取材：CS61C的5?判斷航空航天大學計算機FiveComponentsofaWebeginourstudyofhowacomputerRegistersarepartofthe Summer2012--Lecture ComputerHardwareInhigh-levellanguages,numberofvariableslimitedonlybyavailablememoryISAshaveafixed,smallnumberofoperandscalledregistersSpeciallocationsbuiltdirectlyintoBenefit:RegistersareEXTREMELYFAST(fasterthan1billionthofasecond)Drawback:Operationscanonlybeperformedonthesepredeterminednumberofregistersoperand/操作 Summer Lectureoperand/操作MIPSMIPShas32Eachregisteris32bitswideandholdaTradeoffbetweenspeedandSmallernumbermeansfasterhardwarebutinsufficienttoholddatafortypicalCprogramsRegistershavenotype(Cconcept);theregistercontentsaretreatedavailability/ Summer Lecture availability/MIPSRegisterdenotedby‘$’canbereferencedbynumber($0-$31)orname:Registersthatholdprogrammer Registersthatholdtemporary

You’lllearnabouttheother14registersIngeneral,usingregisternamesmakescodemorereadable Summer2012--Lecture 內(nèi)容主要取材：CS61C的5?判斷航空航天大學計算機MIPSInstructionSyntaxisopdst,src1,1operator,3op=operationnamedst=registergettingresultsrc1=firstregisterforoperation(“sourcesrc2=secondregisterforoperation(“sourcesyntax/語法rigid/固定的operator/操作符syntax/語法rigid/固定的operator/操作符regularity/MIPSOneoperationperinstruction,atmostoneinstructionperlineAssemblyinstructionsarerelatedtoCoperations(=,+,-,*,/,&,|,etc.)Mustbe,sinceC posesintoAsinglelineofCmaybreakupintoseverallinesofMIPS Summer2012--Lecture MIPSInstructions(assumeherethatthevariablesa,b,andcareassignedregisters$s1,$s2,and$s3,IntegerAddition a=b+ add$s1,$s2,IntegerSubtraction a=b- sub$s1,$s2, Summer2012--Lecture MIPSInstructionsSupposea→$s0,b→$s1,c→$s2,d→$s3,ande→$s4.ConvertthefollowingCstatementtoMIPS:a=(b+c)–(d+Utilizetemporary Summer2012--Lecture CommentsinCommentsinMIPSfollowhashmark(#)untiltheendoflineImprovesreadabilityandhelpsyoukeeptrackof### Summer2012--Lecture TheZeroZeroappearssooftenincodeandissousefulthatithasitsownregister!Registerzero($0or$zero)alwayshasthevalue0andcannotbechanged!i.e.anyinstructionwith$0asdsthasnoExample–add#–add# Summer2012--Lecture NumericalconstantsarecalledSeparateinstructionsyntaxforopidst,src,–Operationnamesendwith‘i’,replace2ndsourceregisterwithanimmediate(checkGreenSheetforun/signed)Example–addi5#–addi1#Whynosubi Summer2012--Lecture 內(nèi)容主要取材：CS61C的5?判斷航空航天大學計算機FiveComponentsofaregisters(Datapath)andMemoryAllowustofetchandstoreoperandsinStoreLoadSummer2012--LectureDataCvariablesmapontoWhataboutlargedatastructureslikeDon’tforgetmemory,ourone-dimensionalarrayindexedbyaddressesstartingat0SpecializeddatatransferinstructionsmovedatabetweenregistersandmemoryStore:registerTOLoad:registerFROM Summer2012--Lecture DataInstructionsyntaxfordataopreg,op=operationnamereg=registerforoperationsourceorbAddr=registerwithpointertomemory(“baseoff=addressoffset(immediate)inbytesReminder:Aregisterholdsawordofrawdata(notype)–makesuretousearegister(andoffset)thatpointtoavalidmemoryaddress Summer2012--Lecture MemoryisByte-WhatwasthesmallestdatatypewesawinAchar,whichwasabyte(8Everythinginmultiplesof8bits(e.g.1word=4bytes)Memoryaddressesareindexedbybytes,notwordsWordaddressesare4bytesWordaddrissameasleft-most

Addroflowestbyte…………5670…………5670123Offsetsaremultiplesof4tobe“word-PointerarithmeticnotdoneforyouinMusttakedatasizeintoaccount Summer2012--Lecture DataTransferLoadWordTakesdataataddressbAddr+offFROMmemoryandplacesitintoregStoreWordTakesdatainregandstoresitTOmemoryatExample#addrofintA[]->$s3,a->### Summer2012--Lecture Registersvs.WhatifmorevariablesthanKeepmostfrequentlyusedinregistersandmovetheresttomemory(calledspillingtomemory)WhynotallvariablesinSmallerisfaster:registers100-500timesRegistersmoreIn1arithmeticinstruction:read2operands,performoperation,and1In1datatransferinstruction:1read/write, Summer2012--Lecture GreatIdea#3:PrincipleofLocality/MemoryHierarchyQuestion:Whichofthefollowingisadd$t0,$t1,4($t2)isvalidCanbyteaddress8GBwithaMIPSoffoffmustbeamultipleof4lw$t0,off($s0)tobeCharsandRecall:AstringisjustanarrayofcharactersandacharinCuses8-bitASCIIMethod1:Movewordsinandoutofmemoryusingbit-maskingandshifting andi$s0,$s0,0xFF#lowestMethod2:Load/storebyte Offsetsnolongertobemultiplesof Summer2012--Lecture Bytelb/sbutilizetheleastsignificantbyteoftheOnsb,upper24bitsareOnlb,upper24bitsarefilledbysign-Forexample,let*($s0)= ###Normallyyoudon’twanttosign-extend–Uselbu(loadbyte Summer2012--Lecture BigEndian:Most-significantbyteatleastaddressofwordaddress=addressofmostsignificantLittleEndian:Least-significantbyteatleastaddressofwordaddress=addressofleastsignificant little big MIPSisbi-endian(cangoeitherUsingMARSsimulatorinlab,whichislittleWhyisthisDatastoredinreverseorderthanyouwriteitData storedas04030201in

LectIreasing 內(nèi)容主要取材：CS61C的5?判斷航空航天大學計算機ComputerDecisionInC,wehadcontrol esofcomparative/logicalstatementsdeterminedwhichblocksofcodetoexecuteInMIPS,wecan’tdefineblocksofcode;allwehavearelabelsDefinedbytextfollowedbyacolon(e.g.main:)andreferstotheinstructionthatfollowsGenerateflowcontrolby Chasthesetoo,buttheyareconsideredbad Summer2012--Lecture DecisionMakingBranchIfEqualbeqIfvalueinreg1=valueinreg2,gotoBranchIfNotEqualbneIfvalueinreg1≠valueinreg2,gotoJumpjUnconditionaljumpto Summer2012--Lecture BreakingDowntheIfCif(i==j)a= /*then}elsea=-b/*else}InIfTRUE,executetheTHENIfFALSE,executetheELSE

MIPS#i→$s0,j→$s1#a→$s2,beqThislabelsub$s2,$0,$s3 add$s2,$s3,$0 Summer2012--Lecture BreakingDowntheIfCif(i==j)a= /*then}elsea=-b/*else}InIfTRUE,executetheTHENIfFALSE,executetheELSE

MIPS#i→$s0,j→$s1#a→$s2,bneadd$s2,$s3,$0 sub$s2,$0,$s3 Summer2012--Lecture LoopsinTherearethreetypesofloopsinwhile,do…while,andEachcanberewrittenaseitheroftheothertwo,sothesameconceptsofdecision-makingapplyYouwillexaminehowtowritetheseinMIPSinKeyConcept:ThoughtherearemultiplewaystowritealoopinMIPS,thekeytodecision-makingistheconditionalbranch Summer2012--Lecture ComputersunderstandtheinstructionsoftheirISARISCDesignSmallerisfaster,keepitMIPSRegisters:$s0-$s7,$t0-$t9,MIPSData

add,sub,addilw,sw,lb,sb,lbubeq,bne,j Summer2012--Lecture Youareresponsibleforthematerialcontainedonthefollowingslides,thoughwemaynothaveenoughtimetogettotheminlecture.Theyhavebeenpreparedinawaythatshouldbeeasilyreadableandthematerialwillbetoucheduponinthefollowinglecture. Summer2012--Lecture 測試：2種寫法的區(qū)測試：2種寫法的區(qū)別while(*p*q++=*p++Let’sputourallofournewMIPSknowledgetouseinanexample:“FastStringCopy”Ccodeisas/*Copystringfromptoq*/char*p,*q;while((*q++=*p++)!=‘\0’)WhatdoweknowaboutitsCtoMIPSStartwithcode#copyStringpto#p→$s0,q→$s1

j

#$t0=*p#*q=$t0#p=p+1#q=q+#if*p==0,goto#goto Summer2012--Lecture CtoMIPS?Fillin#copyStringpto#p→$s0,q→$s1 #$t0= #*q=addi#p=p+addi#q=q+beq#if*p==0,gotoj#gotoSummer2012--LectureCtoMIPS#copyStringpto#p→$s0,q→$s1 #$t0= #*q=addi#p=p+addibeq#q=q+#if*p==0,goj#goto#NcharsinpN*6 Summer2012--Lecture CtoMIPSAlternatecodeusing#copyStringpto#p→$s0,q→$s1Loop:lb $t0,0($s0)#$t0=*p $t0,0($s1)#*q=$t0addi$s0,$s0,1 #p=p+1addi #q=q+bne$t0,$0,Loop#if*p!=0,goto#Ncharsinp=>N*5 Summer2012--Lecture MIPSArithmeticThefollowingcommandsplaceresultsinthespecialregistersHIandLOAccessthesevalueswith“movefrom(mfhidst)and“movefromLO”(mfloMultiplicationmultsrc1*src2:lower32-bitsinLO,upper32-bitsinDivisiondivsrc1/src2:putsquotientinLO,remainderin Summer2012--Lecture MIPSArithmetic#modusingdiv:$s2=$s0mod#=#=$s0 Summer2012--Lecture ArithmeticRecall:Overflowoccurswhenthereisamistakeinarithmeticduetothelimitedprecisionincomputers–i.e.notenoughbitstorepresentanswerMIPSdetectsoverflow(throwsArithmetic“unsigned”instructionsignoreOverflowNoOverflowaddiaddiu Summer2012--Lecture Arithmetic

Recall:thisisthemostnegative# , $t0,$s0,$s0#overflow(error)addu$t1,$s0,$s0#$t1